Broadcom-posted about 1 year ago
$107,000 - $190,000/Yr
Full-time • Mid Level
Fort Collins, CO
Computer and Electronic Product Manufacturing

The HBM Memory Applications Engineer at Broadcom is responsible for providing exceptional customer support for custom silicon ASIC products that integrate Broadcom's High Bandwidth Memory (HBM) PHY IP with HBM DRAM memory modules. This role involves direct collaboration with ASIC customers and DRAM suppliers to resolve HBM DRAM issues, requiring a strong background in DDR memory system development and debugging.

  • Develop a detailed understanding of Broadcom's HBM IP and its performance at the ASIC and system levels.
  • Work directly with Broadcom's ASIC customers on their custom silicon products during design, bring-up, and debugging of HBM memory issues.
  • Develop scripts and run characterization tests to isolate issues.
  • Design automated bench-level device testing procedures using programmable test equipment and HBM IP built-in test functions.
  • Collaborate with HBM IP design teams to root cause HBM issues.
  • Coordinate with memory suppliers to resolve HBM DRAM issues or defects.
  • Work with memory suppliers and Broadcom's manufacturing teams to define and implement manufacturing test improvements for HBM DRAM or PHY defects.
  • Generate comprehensive test reports with clear analysis methods that highlight the relationships between stimulus/setup conditions and device performance.
  • BSEE with 8+ years of relevant experience in DDR memory system design, validation, bring-up, and debugging, or MSEE with 6+ years of relevant experience.
  • Expertise in DDR memory interfaces including PHY, controller, and embedded test capability; direct experience with HBM memory is a plus.
  • Experience developing DRAM memory tests and knowledge of different types of memory tests is essential.
  • Understanding of VLSI IC I/O & control, and built-in self-test (BIST).
  • General knowledge of semiconductor technology and ASIC design flow including Verilog simulation and timing analysis; Verilog experience is a plus.
  • Experience with lab test equipment for evaluating memory interfaces, including sampling scopes, real-time scopes, function generators, and logic analyzers.
  • Extensive programming experience in at least one of the following languages: Ruby (preferred), C, C++, Perl, or Python.
  • Strong debugging skills.
  • Strong verbal, written communication, and presentation skills.
  • Ability to multitask and manage multiple technical issues in parallel.
  • Well organized, methodical, and detail-oriented.
  • Medical, dental, and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Company paid holidays
  • Paid sick leave and vacation time
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