Hardware & Silicon Validation Principal Engineer

Marvell TechnologySanta Clara, CA
1d

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Marvell post silicon validation group designs and develops test platforms for validating multi-core Arm-based Network processors and custom ASIC’s, used in many communication infrastructure applications such as 5G base stations, hard disk drive (HDD), Fiber Channel (FC), solid‐state drive (SSD), NICs, Data Center and Cloud Computing platforms. As a member of the Post-Silicon Validation team, you will have the opportunity to contribute to several areas of product development and validation including functional, electrical, and system stress. Additional contribution opportunities include the development of SW, test plans, and utilities to enable customer platforms. The Post-Silicon Validation team develops solutions and validates a range of IO interfaces and functions on multi-core ARM processors including DDR5, Ethernet, RFOE, PCIe, USB, eMMC, and more. What You Can Expect Responsible for post-silicon validation testing and debugging of high-speed Ethernet and PHY interface IP products. Perform Ethernet Protocol Compliance testing, validate Ethernet standards (IEEE 802.3, 802.1Q, Layer 2 and Layer 3 protocol testing including VLAN, ARP, STP, DHCP, DNS, TCP/IP, OSPF, BGP.etc.). Perform interop of the Ethernet interface including link training, auto-neg with different switches, SFP modules, DAC etc. Design and implement Python-based automation frameworks for functional, regression, and manufacturing tests to enhance efficiency and reduce manual effort. Configure and maintain scalable lab environments for software and network feature validation. Integrate automated test execution into CI/CD pipelines using tools such as Jenkins; analyze failures and perform root cause analysis. Develop and maintain bare-metal embedded test code in C/C++ to control and validate high-speed network processor ASIC SoCs across various product lines. Collaborate with cross-functional teams to ensure that hardware components and systems meet stringent performance, reliability, and compliance standards. Customer Support & Escalation Handling: Troubleshoot field issues, reproduce problems in-house, and verify fixes.

Requirements

  • Bachelor's degree in Software, Computer or Electrical Engineering, and at least 10-15 years professional experience and/or Master's degree in Software, Computer or Electrical Engineering, and at least 5-10 years professional experience.
  • Expertise in Ethernet Physical layer (Layer 1&2) - Serdes, MAC, PCS including debugging L1 issues for Interop is desirable.
  • Familiarity with hardware equipment such as Traffic generators (Ixia/Spirent/Xena), protocol analyzers, oscilloscopes, and logic analyzers.
  • Excellent troubleshooting skills to resolve silicon issues and provide technical/debug support to internal or external customers.
  • Extensive experience in understanding requirements/architect/design of networking communications standard bodies like IEEE, IETF etc.
  • Extensive experience in network programming languages such as C or equivalent.

Nice To Haves

  • Familiarity with High Speed Ethernet Serdes interfaces : NRZ, PAM-4 100G will be PLUS.

Responsibilities

  • Responsible for post-silicon validation testing and debugging of high-speed Ethernet and PHY interface IP products.
  • Perform Ethernet Protocol Compliance testing, validate Ethernet standards (IEEE 802.3, 802.1Q, Layer 2 and Layer 3 protocol testing including VLAN, ARP, STP, DHCP, DNS, TCP/IP, OSPF, BGP.etc.).
  • Perform interop of the Ethernet interface including link training, auto-neg with different switches, SFP modules, DAC etc.
  • Design and implement Python-based automation frameworks for functional, regression, and manufacturing tests to enhance efficiency and reduce manual effort.
  • Configure and maintain scalable lab environments for software and network feature validation.
  • Integrate automated test execution into CI/CD pipelines using tools such as Jenkins; analyze failures and perform root cause analysis.
  • Develop and maintain bare-metal embedded test code in C/C++ to control and validate high-speed network processor ASIC SoCs across various product lines.
  • Collaborate with cross-functional teams to ensure that hardware components and systems meet stringent performance, reliability, and compliance standards.
  • Customer Support & Escalation Handling: Troubleshoot field issues, reproduce problems in-house, and verify fixes.

Benefits

  • Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments.
  • Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition.
  • Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
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