GPU Top Level Physical Design Engineer

Apple • Santa Clara, CA

103d

About The Position

As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You’ll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you’ll be crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices! This role requires a mix of strategic engineering along with hands-on, technical work. You will be responsible for implementing complete chip design from netlist to tapeout. You will have hands on experience in physical design and large chip integration.

Requirements

• BS + 10 years of relevant experience.
• Experience with ASIC integration including one or more of the following: Floorplanning, Clock and Power distribution, global signal planning, I/O planning.
• Experience with Floorplanning tools, P&R flows (Cadence or Synopsys).

Nice To Haves

• Experience with hierarchical design approach, top-down design, budgeting, timing and physical convergence.
• Experience integrating IP from both internal and external vendors and specifying and driving IP requirements in the physical domain.
• Experience with Physical Design topics: multiple voltage and clock domains, ESD solutions, and mixed signal block integration.
• Experience with large subsystem designs (>20M gates) with frequencies in excess of 1GHz applying brand new technologies.
• Familiar with various process related design issues including Design for Yield and Manufacturability, multi Vt strategies and thermal management.
• Proven track record in solving complex PD and multi-functional problems, driving results directly or directing a team of engineers.
• Understanding of GPU architecture and design units.
• Experience with Floorplanning tools, P&R flows, global timing verification and Physical Design Verification Flows.

Responsibilities

• Collaborate with FE team to understand RTL and drive physical aspects early in design cycle.
• Drive innovation with the physical design team, developing methodologies and best known methods for GPU design.
• Develop PD guidelines and checklists, drive execution, and supervise progress.
• Be the focal point for place and route integration at the top level.
• Communicate and drive the needs of PD with cross-functional teams to achieve back-end design goals.

What This Job Offers

• Education Level: Bachelor's degree
• Number of Employees: 5,001-10,000 employees