The Role: Join the Engine & Transmission Controls (ETC) group as a Functional System Architect (FSA) in charge of understanding and defining functional system requirements and architectures in relation to Torque Architecture, Engine Protection and more. As an FSA, you are the technical leader of large group of engineers to define all aspects of engine controls and diagnostic systems. You will provide mentoring, guidance to the Sub-System Lead Engineers work products within our team. You will be seen as one of the technical experts in ETC and thus mentor and develop the department’s knowledge of your space. What You'll Do: Develop and drive the requirements architectural vision and ART Solution context for your domain. Define ART solutions, break down initiatives & capabilities into deliverables, and create ART features in Jira. Champion the roll-down from Feature Technical Specification, System Technical Specification, Initiative, and Product Teams to create requirements architecture. Ensure seamless integration of Air Delivery, Exhaust Gas Estimation, EGR, etc into the vehicle, including interfaces with other ARTs, hardware teams, advanced work teams, integration teams. Act as the lead contact for the Engineering Pillar of the Product Team. Define the solution context, including supporting technologies, interfaces, APIs, and requirements. Prioritize TFRP with the Systems Engineering organization and Product Team. Pursue and support innovation opportunities within the domain. Own the FMEA cross-functional linkage. Define Functional Controls and Hardware Requirements: Define functional requirements and map inputs to outputs. Define remedial actions based on fault detection, propagation, and maturation. Create context diagrams, functional architecture diagrams, and hardware integration of functions. Develop acceptance criteria for new/modified features and ensure they are met prior to release. Define function interface requirements, including aging, build variation, noise factors, and environmental factors. Define how inputs to the function transform outputs, including latency, overshoot, and oscillation. Define signal/data retention requirements and diagnostic, degraded state, remedial action, and recovery requirements. Define use cases and measurable/objective performance requirements for normal and degraded states. Support the hardware development cycle and hardware PMTs as new technologies are investigated and applied.
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Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees