FPGA Verification Engineer

Cardinal Integrated • Mountain View, CA

75d • Onsite

About The Position

Strong understanding of FPGA design principles and architectures.
Proficiency in System Verilog and UVM verification methodology.
Experience with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS).
Knowledge of code coverage and functional coverage analysis.
Excellent debugging and problem-solving skills.
Strong communication and collaboration skills.

Requirements

• 8 + Years of in FPGA
• 5 +Years of Exp in UVM
• 5 +Years of Exp in System Verilog
• Bachelor's or master's degree in electrical engineering, Computer Engineering, or a related field.
• Experience in FPGA verification.
• Experience with scripting languages (e.g., Python, Perl).
• Familiarity with hardware description languages (e.g., VHDL, Verilog).

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Industry: Professional, Scientific, and Technical Services
• Number of Employees: 11-50 employees