Seeking motivated entry to senior level FPGA engineers to join our growing Communication and Signal Processing (CSP) Division at the Applied Research Laboratory (ARL) at Penn State University. The role involves extensive knowledge in FPGA design. We desire a person interested in collaborating and learning with a team of fellow brilliant researchers to develop the next level of processing and analysis algorithms, possess an inquisitive mind, and have a passion to develop the best software and hardware solutions. ARL fosters and develops some of the greatest minds that the Department of Defense (DoD) has to offer. This position seeks to train/mentor individuals in becoming experts in the area of algorithm development. Locations include onsite in either State College, PA or Reston, VA with potential hybrid options. ARL is an authorized DoD SkillBridge partner and welcomes all transitioning military members to apply.