Intuitive-posted 2 days ago
Full-time • Mid Level
Sunnyvale, CA
1-10 employees

Reporting to the Manager of FPGA – Imaging, this Engineer will play a role in delivering best-in-class image/video processing solutions for our da Vinci systems (and other robotic platforms), as part of an excellent cross-functional team. The engineer in this position will work with the broader Vision and EE teams to architect, implement and verify image sensor interfaces and image processing algorithms on FPGAs / FPGA SoCs deployed on the platform. This includes components in the entire processing chain, photon-to-photon: from image sensor data acquisition to stereo (and mono) displays. The ideal candidate will possess a background in FPGA-based video/image processing with exposure to typical image processing algorithms and image sensor interfaces – implementation and evaluation with the trade-offs between visual quality, performance, and FPGA resource utilization in mind.

  • Implement designs using (System)Verilog and verify in simulation and on hardware
  • Partner with cross‑functional experts to drive balanced trade‑offs across resources, cost, performance, and practicality to deliver optimal video processing architectures.
  • Collaborate on improvements to FPGA design and verification methodology; explore avenues to reduce development and verification time
  • Investigate and evaluate new FPGA / FPGA-SoC platforms for low-latency video processing
  • Minimum of 5 years of experience and a Bachelor's degree; or 3 years of experience and a Master's degree; or a PhD without experience; or equivalent work experience
  • Experience with SystemVerilog, C (or C++) and a scripting language such as Python or TcL
  • Understanding of and experience with high-speed digital design and associated challenges
  • Foundation in using FPGA build tools such as: AMD/Xilinx, Intel and/or Lattice
  • Foundation in using FPGA simulation tools, environments and in test bench development
  • Understanding of static timing analysis / timing constraints
  • Experience with FPGA part and pin selection process
  • Experience with video I/O standards and interfaces: HDMI, DisplayPort, MIPI CSI‑2/DSI, SDI; integration of vendor/IP cores
  • Experience with revision control software e.g. Git
  • Experience with Intel Agilex / Stratix, AMD Versal devices is a plus
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