FPGA Engineer III

F5-posted 3 months ago
$124,800 - $187,200/Yr
Full-time • Mid Level
San Jose, CA
5,001-10,000 employees
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F5 is seeking a talented and experienced FPGA Engineer III to join our dynamic engineering team. In this role, you will play a key part in the development of high-performance networking products, driving innovation and delivering cutting-edge FPGA-based solutions. As an integral part of the team, you'll work on designing high-speed and efficient modular FPGA system designs while contributing to simulations, hardware validation, debugging, and performance optimization. You will collaborate closely with Senior FPGA Engineers, Systems Architects, and other cross-functional teams on complex projects that require creative problem-solving and a deep understanding of FPGA development. This role not only offers technical challenges but also provides opportunities to advance your skills in cutting-edge networking and hardware design. If you are passionate about pushing the limits of FPGA technology in a fast-paced and collaborative environment, we want you on our team.

  • Design and implement advanced FPGA modules, including RTL coding and logic partitioning, using System Verilog.
  • Develop verification plans and self-checking simulation test environments to verify system functionality and ensure design robustness, using System Verilog / UVM-based verification environments.
  • Contribute to architectural decisions, develop module micro-architectures, and ensure designs operate seamlessly with other modules in the system.
  • Debug and validate FPGA designs in lab environments using tools such as oscilloscopes, logic analyzers, and traffic generators like IXIA, in a Python based lab test infrastructure.
  • Analyze design data and lab results to validate expected performance metrics, guide optimizations, and produce thorough documentation.
  • Drive innovation in high-speed interfaces (e.g., PCIe, Ethernet MACs, AXI) and memory structures.
  • Mentor and provide technical guidance to junior engineers to enhance team capabilities.
  • Collaborate with cross-functional teams to deliver reliable and high-quality products.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 4–6 years of industry experience in FPGA development, including RTL coding in System Verilog.
  • Ability to approach complex issues with creativity, adapting industry best practices to F5’s unique challenges.
  • Excellent verbal and written communication skills, with the ability to collaborate across teams.
  • Ethernet networking fundamentals.
  • Knowledge of high-speed FPGA interfaces such as PCIe, Ethernet MACs, GCI, and AXI.
  • Familiarity with memory architectures and interfaces.
  • Experience working with lab tools like bus analyzers, oscilloscopes, and logic analyzers.
  • Exposure to traffic generation tools (e.g., IXIA) for testing and validation.
  • Familiarity with design repositories such as GitLab and Perforce.
  • Ability to apply Ai tools such as GitLab Duo, GitHub Copilot, and ChatGPT to improve design development efficiency.
  • A proactive attitude with a strong problem-solving mindset.
  • Competitive pay and robust health, wellness, and retirement plans.
  • Opportunities for professional development, mentorship, and leadership.
  • Flexible work arrangements with a supportive hybrid model.
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