Fujifilm-posted 2 months ago
$95,000 - $115,000/Yr
Full-time • Mid Level
Bothell, WA
501-1,000 employees

As an FPGA Engineer III, you will be responsible for implementing innovative FPGA solutions that enable Fujifilm Sonosite ultrasound systems to meet real world clinical needs. You will work with a diverse group of talented engineers from Electrical, Systems, Ultrasound, and Software teams to design the next generation of ultrasound systems using the latest FPGA technologies, FPGA design processes, and tools, from product conception all the way to production. You will have the opportunity to lead projects where you will need to interact with external experts and vendors to understand, integrate and implement new enabling technologies. To be successful in this role you will need to be organized, detail oriented, passionate and driven to solve challenging problems in a team environment.

  • Create and release FPGAs through the development phases of Architecture, RTL Design, Physical Implementation, Timing Closure, Simulation Validation, Lab Based Silicon Validation
  • Collaborate with system architects and ultrasound design engineers to implement digital logic functions in FPGA prototypes to validate/tradeoff architecture & design alternatives
  • Drive trade-off analysis to benefit customer experience and optimization of target technology resources for cost/size/power/performance/features
  • Prioritize work and break down assignments into tasks that can be organized and executed to meet assignment performance and time goals
  • Solve technical issues both as an individual and as a participant on cross-functional teams
  • Apply engineering principles to design products and prototypes
  • Conduct engineering confidence testing and generate technical reports
  • Scripting and basic software development in support of FPGA design verification
  • Support development and/or improvement of NPI processes through active participation in ongoing development in both new and sustaining areas, identifying opportunities for improvements
  • Responsible and accountable for carrying out the requirements of the company’s quality system
  • Communicate project status to lead/manager
  • Communicate with other Engineering departments
  • BS electrical engineering or computer science with 4-6 years relevant industry experience or MS electrical engineering
  • Experience with FPGA/ASIC design software (Altera and/or Xilinx)
  • Experience with VHDL preferred, Verilog experience a plus
  • Experience with simulators (Mentor Modelism desired)
  • Demonstrate proficiencies with FPGA/ASIC verification tools, languages and methodologies
  • VHDL/Verilog, System Verilog, C/C++, scripting (e.g. Bash, Python, TCL)
  • An understanding of object-oriented concepts and experience designing class-based constrained random test benches a plus
  • Experience with signal or image processing applications a plus
  • Experience with randomized regression testing a plus
  • Experience with assertion based verification a plus
  • Experience with code coverage a plus
  • MATLAB experience is a plus
  • Experience with signal or image processing applications
  • Experience with randomized regression testing
  • Experience with assertion based verification
  • Experience with code coverage
  • MATLAB experience
  • $95,000 - $115,000 depending on experience + variable bonus opportunity
  • Medical, Dental & Vision insurance
  • Life & Company paid Disability
  • Retirement Plan (401k): 4% automatic Company contribution
  • Fujifilm matches 50 cents for every dollar you contribute, up to 6% of your salary
  • Paid Time Off: You can accrue up to three (3) weeks of PTO in your first year of employment
  • PTO increases based on years of service
  • Employee Choice Holidays: Four (4) additional paid days off, based on date of hire in the calendar year
  • Paid Holidays: Eight (8) paid holidays per year
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