The selected candidate will be responsible for FPGA development on R D program. This engineer with have experience in developing, testing, and integrating high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms. Experience with Xilinx Ultrascale FPGA platforms, Xilinx Vivado tool suite required. Must be fluent in VHDL language (additional knowledge of Verilog/SystemVerilog a plus). Candidate with Spacewire knowledge/experience preferred. Experience with Python also desirable. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts on ground test equipment for space missions. Cross discipline collaboration with Test, Integration, Software, Systems Architects and Digital Circuit designers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. Overall contribution to design, simulation, verification, integration & test of complex, high speed products. Onsite, Denver CO.
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Career Level
Mid Level
Education Level
No Education Listed
Number of Employees
51-100 employees