SEL Government Services Department (GSD) is seeking an experienced FPGA design engineer to help develop a new device platform to meet the communication, metering, and power protection needs of the U.S. government. As an FPGA design engineer, you will develop RTL/HDL for devices that make electric power safter, more reliable, and more economical. You will work with firmware, hardware, automation, and power engineers to spec, design, code, and test programmable logic for FPGAs and SoCs. SEL is committed to providing its engineers an environment of innovation in the power industry. You will have opportunities to invent and improve standards and own patents. US CITIZENSHIP REQUIRED A typical day might include the following: Designing data acquisition, digital signal processing, and communication protocol RTL sub-systems Modeling low-level and system-level designs using software languages like Python and MATLAB Writing RTL component interface specifications, HDL code, and unit test simulations Synthesizing and integrating your HDL into hardware and performing in-hardware verification Working with firmware engineers to define cross-discipline interfaces Reviewing others' work Mentoring and/or supervising junior engineers in FPGA development