FPGA Design Engineer

Arista NetworksSanta Clara, CA
3h$110,000 - $170,000

About The Position

As a core member of the FPGA Design and Verification team, the candidate will be part of a fast-paced, high caliber team Designing and Verifying control path FPGA's for Arista Network products used in the computer networking industry's largest data centers. The FPGA Design Engineer is responsible for all aspects of the control path FPGA, from collecting the functional requirements that are needed, to reviewing the schematics of the board design engineer, to verifying the design using the latest tools, to bring-up and support of such a vital part of the networking hardware design. The successful candidate will work closely on a project from its early conception to the customer shipment and support when needed. They will work with fellow engineers and members of the hardware, software, and manufacturing team to understand the feature requirements, design and validate it. Besides closely working with the hardware engineers in designing the board, they will also review the hardware specifications and take ownership of the control path FPGA.

Requirements

  • 1-5 years of designing Verilog/System-Verilog RTL code
  • Control path design experience (Ethernet Data path design experience preferred)
  • On-chip bus interfacing design experience e.g. AXI (Streaming bus interfacing design experience preferred)
  • FPGA design resource and timing closure experience preferred
  • Python/TCL/Scripting experience

Responsibilities

  • Verilog/System Verilog code development, integration, simulation, and testbench creation
  • Perform FPGA implementation including synthesis, place and route, timing analysis, and debug
  • Collaborate with hardware and software engineers for rapid system-level bringup and debugging of network switch designs
  • Participate in fpga level code reviews, as well as schematic and board design reviews
  • Incorporate scripting to process input/output data for FPGA toolchains
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