FPGA/ASIC Verification Engineer

L3Harris Technologies-posted 4 months ago
$90,500 - $168,500/Yr
Full-time • Mid Level
Rochester, NY
Transportation Equipment Manufacturing
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Join our team at L3Harris and play a critical role in developing secure, cutting-edge tactical communication systems that protect those who protect us. As an FPGA Verification Engineer, you'll collaborate with a talented, mission-driven team, verifying next-generation FPGA solutions for our radios used by military and first responders worldwide. This is a hands-on opportunity to grow your expertise in UVM, advanced verification methodologies, and complex communication systems—while enjoying work-life balance with flexible schedules and every other Friday off.

  • Perform FPGA design verification and validation of embedded electronic communication.
  • Assist in development of high-level and detailed verification test plans consistent with system requirements and specifications.
  • Develop self-checking test benches for FPGA design verification and validation using SystemVerilog.
  • Develop Agents, Test sequences, Covergroups, Predictors, Scoreboards.
  • Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals.
  • Work with cross functional teams as needed to define and verify product and design requirements.
  • Prepare design and implementation reviews.
  • Present technical briefings and status to internal and external customers.
  • Bachelor's Degree and minimum 6 years of prior relevant experience.
  • Graduate Degree and a minimum of 4 years of prior related experience.
  • In lieu of a degree, minimum of 10 years of prior related experience.
  • Experience developing and verifying FPGA/ASIC based embedded system solutions.
  • Demonstrated ability to analyze and debug FPGA firmware and related hardware issues.
  • Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.
  • Experience with cryptographic algorithms and cryptographic solutions for embedded communication systems.
  • Experience with Mentor Graphics Verification tools.
  • FPGA/ASIC RTL Design experience.
  • Proficiency in Object Oriented Programming (C++, JAVA).
  • Proven proficiency in FPGA/ASIC verification using SystemVerilog.
  • Working knowledge of UVM/OVM methodology.
  • Experience with Advanced Functional Verification tools to report functional coverage.
  • Experience with scripting languages (Bash, Perl, Python, Tcl).
  • Familiarity in working within Linux OS.
  • Familiarity with industry standard interfaces (Ethernet, AXI, SPI).
  • Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization.
  • Highly motivated, self-starter, who works well in team environments.
  • Health and disability insurance
  • 401(k) match
  • Flexible spending accounts
  • EAP
  • Education assistance
  • Parental leave
  • Paid time off
  • Company-paid holidays
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