Qualcomm-posted 3 months ago
$164,000 - $246,000/Yr
San Diego, CA
Computer and Electronic Product Manufacturing

As a foundry technology engineer, you will be working in an exciting fast growing automotive semiconductor development team, collaborating closely with our internal teams to define the technology roadmap to meet automotive semiconductor product speed, power, defectivity, and reliability requirements; you will then drive foundry partners to deliver process integration scheme, design rules best optimized for Power/Performance/Area, Product yield, failure analysis, and fast manufacturing ramp. Candidate will work closely on technology maturity and reliability evaluation, model to silicon verification, and eventually help bring products to market with highest yield and reliability. As a member of Qualcomm's industry leading Fabless Semiconductor Technology group, candidate will be responsible for technology node selections for Qualcomm's fast growing Automotive semiconductor products. Candidate will play hands-on role in defining and evaluating new technology features to optimize Power, Performance, Cost, and Reliability metrics as relevant to Automotive application products. He/she will closely collaborate with various internal design, testing, and business teams, and leading foundries to bring up new products to meet performance and power target, and to qualify for market launch.

  • Define the technology roadmap for automotive semiconductor products.
  • Drive foundry partners to deliver process integration schemes and optimized design rules.
  • Evaluate technology maturity and reliability.
  • Conduct model to silicon verification.
  • Collaborate with internal design, testing, and business teams.
  • Select technology nodes for automotive semiconductor products.
  • Define and evaluate new technology features to optimize metrics.
  • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • 6+ years' experience in CMOS technology development especially in Finfet and beyond semiconductor process nodes.
  • Proficient in breadth of advanced CMOS technology: technology process flow, Design Technology Co-Optimization, Device physics, and Reliability.
  • Good understanding of device/product reliability requirements and qualification.
  • Solid understanding of yield, including defect pareto development and the Failure Analysis (FA) methodology.
  • Strong data analysis and statistical analysis skills; proficiency with data analysis tools for both device and yield analysis.
  • Outstanding interpersonal skills and intellectual curiosity.
  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Comprehensive benefits package designed to support success at work, at home, and at play.
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