Formal Verification Engineer - New College Grad 2026
About The Position
As a Formal Verification Engineer at NVIDIA, you will work in the formal verification team for the industry's leading chips. We are looking for outstanding candidates with knowledge of formal methods. The engineer will own the task of formal verification of RTL units for next generation chip designs. This will involve the candidate having deep knowledge of architectural as well as micro-architectural details of the unit. Ideal candidate must have strong analytical skills, computer architecture background and as well as experience in application of effective verification methodology. NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Formal Verification team and help build the real-time, cost-effective computing platform driving our success in this exciting and quickly growing field.
Requirements
- BS, MS, or Ph.D. in CS/CE/EE/Mathematics or equivalent experience.
- Strong analytical skills to solve difficult problems.
- Knowledge/Experience in formal verification techniques.
- Strong knowledge of architectures of CPU/GPU designs and digital logic.
- Understanding of abstraction techniques for effective verification.
- Hands-on experience with HDLs such as Verilog / System Verilog.
- Ability to understand RTL quickly.
- Understanding of temporal logic assertions.
- Excellent communication skills with ability to work with team members and collaborate effectively.
Nice To Haves
- Preferable experience with Formal Verification Tools (eg. Jasper, IFV, SMV, SPIN)
Responsibilities
- Developing comprehensive FV testplan documents.
- Identifying key behaviors for verification of DUT and creating a verification plan.
- Developing verification environment including environment assumptions, assertions and cover properties in context of the verification plan.
- Applying various FV techniques to proof correctness of digital designs.
- Debugging RTL to identify failure scenarios.
- Developing scripts to automate the verification process.
- Review formal setups and proofs with design and verification teams.
Benefits
- You will also be eligible for equity and benefits.
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What This Job Offers
Job Type
Full-time
Career Level
Entry Level
Industry
Computer and Electronic Product Manufacturing
Education Level
Ph.D. or professional degree
Number of Employees
5,001-10,000 employees
