EVA DV Engineer

Qualcomm • Santa Clara, CA

223d • $122,500 - $183,700

About The Position

As a Verification Engineer, you will be responsible for understanding the expected functionality of multimedia designs, specifically computer vision hardware IP and subsystem. You will work with the architects of these multimedia systems, as well as multimedia ASIC designers and SW engineers to plan and execute verification and validation of multimedia subsystems for integration into SoCs for mobile applications.

Requirements

• Bachelor's degree in Computer or Electrical Engineering, Computer Science, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• OR Master's degree in Computer or Electrical Engineering, Computer Science, or related field and 1+ year of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• OR PhD in Computer or Electrical Engineering, Computer Science, or related field.

Nice To Haves

• Test planning, problem solving, debug, Verification of Multi-media hardware
• Strong working knowledge of HVLs: System Verilog, OO programming.
• Verilog, C/C++, Tcl/Perl/python/shell-scripting
• Experience with OVM/UVM methodology.
• Strong working experience in coverage driven constraint random verification.
• Experience in developing the Models for verification & synthesizable models for emulation in Verilog/SV
• Experience in formal verification is plus
• Experience in building simulation acceleration environment is plus
• Prior experience in multi-media HW accelerator verification is plus

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level
• Industry: Computer and Electronic Product Manufacturing
• Education Level: Bachelor's degree