Engineer I-Design

Microchip Technology Inc.•Allentown, PA

About The Position

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: The Allentown, PA location is seeking a new college graduate engineer to join our design team! This role offers the opportunity to gain handson experience with next-generation PCIe device design and development in a collaborative engineering environment.

Requirements

Bachelor’s or Master’s degree (or equivalent) in Electrical Engineering or Computer Engineering
Experience or academic background in digital design for PCIe devices and peripherals

Nice To Haves

Experience with ASIC and/or FPGA development flow
Proficiency in Verilog or SystemVerilog for logic design
Strong understanding of RTL synthesis, static timing, and timing closure
Knowledge of MIPS, x86 systems, and DMA architecture
Familiarity with PCI Express protocol
Exposure to low-power design using UPF/CPF

Responsibilities

Design digital logic circuits at the block level or top level of next-generation PCIe devices
Contribute to device feature set definition
Design and/or verify device features
Perform development activities including: Integration, Synthesis, Design for Testability (DFT), and Static Timing Analysis (STA)
Execute functional block-level microarchitecture and RTL design
Conduct RTL simulation, debugging, and linting
Perform RTL synthesis, static timing, and timing closure
Support low-power design methodologies