About The Position

As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We are seeking a passionate Emulation Engineer to build the next generation of our cloud server infrastructure using our emulation platform. You will work closely with various teams to determine the emulation platform requirements, models needed for functional testing and automation of various workflows. You will be delivering a state-of-the-art testbench, integrate the ViP components into the SoC and ensure a high quality of the design delivered to the customers. You will be developing a strong understanding of the product and continuously raise the bar to ensuring that emulation models are functionally correct and performant. Join us in creating the most advanced Machine Learning Accelerators in the world!

Requirements

  • Bachelor's degree in Electrical Engineering or a related field
  • Experience identifying bugs in architecture, algorithms, functionality, and performance with strong overall debugging skills
  • Experience in developing functional specifications, design verification plans and functional test procedures

Nice To Haves

  • Master's degree in Electrical or Communications Engineering or a related field
  • Experience with formal verification techniques including abstraction and end-to-end checking
  • Experience with ARM and various DSP ISAs
  • Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards
  • Experience with industry standard tools and scripting languages (Python or Perl) for automation

Responsibilities

  • Design emulation capabilities in system verilog/C/C++/Python/Shell scripts to facilitate system validation flows
  • Develop scalable compile flows targeting project requirements
  • Knowledge of end to end emulation compilation flows involving front end and back end synthesis
  • Familiar with using emulation tool chain from Zebu, Cadence or Veloce
  • Develop System Verilog modules required for integrating with standard xtors
  • Experience in run time architecture of any emulation framework.
  • Develop run time framework in C++ to execute compiled emulation models
  • Optimize build and run times of emulation models.
  • Automate system flow execution in emulation using bash/python/tcl etc.
  • Work with SoC teams to learn about system flows and execute them on emulation framework
  • Debug RTL failures associated with chip functionality
  • Proficient with using various emulation debug technologies
  • Knowledge of using gdb and other techniques to debug software failures
  • Work with vendors to ensure emulation tool chain is up to date with latest technologies

Benefits

  • health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
  • 401(k) matching
  • paid time off
  • parental leave
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service