About The Position

Client is always looking to move technology forward, and is seeking embedded software engineers with experience working with a Cadence/Tensilica tool flow. A successful candidate will have worked with recent-generation Tensilica/Cadence cores such as the HiFi, LX7, VP6, and other similar cores. They will have experience selecting and designing TIE instructions, and configuring the core for various application-specific workloads. The candidate will be responsible for helping benchmark software across various configurations, and potentially hand-optimize assembly-level kernels to make best use of the hardware.

Requirements

  • experience working with a Cadence/Tensilica tool flow
  • worked with recent-generation Tensilica/Cadence cores such as the HiFi, LX7, VP6, and other similar cores
  • experience selecting and designing TIE instructions, and configuring the core for various application-specific workloads

Responsibilities

  • Design, author, and maintain software, often in C/C++ language
  • Participate in team code review process and meetings
  • Assist in developing and deployment of RTOS on the Cadence platform
  • Convert high level C++ algorithms into performant VLIW code, often assembly
  • Develop tooling and guidance for others to author high performance software on the Cadence platform
  • Profile existing software and propose custom TIE instructions that would potentially improve performance
  • Respond to internal support and debugging issues as needed
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