Electrical System Power Modeling Engineer, Level 5

Snap Inc.•Los Angeles, CA

2d•$162,000 - $284,000•Onsite

About The Position

Snap Inc is a technology company. We believe the camera presents the greatest opportunity to improve the way people live and communicate. Snap contributes to human progress by empowering people to express themselves, live in the moment, learn about the world, and have fun together. The Company’s three core products are Snapchat, a visual messaging app that enhances your relationships with friends, family, and the world; Lens Studio, an augmented reality platform that powers AR across Snapchat and other services; and its AR glasses, Spectacles. Spectacles is home to our hardware products with a world-class research & development team. We are focused on pushing the boundaries of what a camera can be, specifically overlaying computing on the real world. Next Generation Spectacles are our first pair of glasses that bring augmented reality to life. We’re looking for an Electrical Engineer, Devices to join the Spectacles team at Snap Inc! What you’ll do: Power Model Ownership: Develop, maintain, and continuously improve a system-level power model that accurately predicts the power consumption of all hardware components and software activities across different operational states and use cases Load Characterization: Understand, characterize, and model power consumption for a wide array of system loads, including SoCs, CPUs, GPUs, memory, displays, wireless radios, sensors, actuators, and peripherals across varying functional modes Battery Modeling: Integrate battery model (ESR) into use-case based run time estimates as well as HW system DCR and grounding requirements Use Case Analysis: Collaborate with product and system architecture teams to define and model various use cases and translate into quantifiable power profiles Early Power Estimation: Extract and integrate pre-silicon power estimates and power breakdown data for chips under development, providing crucial feedback for architecture choices Cross-Functional Collaboration: Partner effectively with various submodule teams (e.g., silicon design, software, firmware, display, camera, wireless, audio, thermal) to gather accurate power consumption data, understand their respective power budgets, and identify optimization opportunities Benchmarking & Validation: Hand-on measurement of power and performance data from prototypes and compare it against model predictions across HW and SW features. Debug discrepancies, identify root causes, and refine models to improve accuracy and predictive capability. Power Optimization Guidance: Provide data-driven insights and recommendations to hardware and software teams for power reduction strategies, trade-offs, and design optimizations. Documentation: Create and maintain comprehensive documentation for power models, assumptions, methodologies, test procedures, and analysis reports.

Requirements

Knowledge of system architecture and subsystem metrics that impact performance for SOCs, Camera, Connectivity, Cellular, PMICs, and Battery.
Knowledge of power management concepts and power delivery
Excellent communication and collaboration skills
BS degree in Electrical Engineering, Computer Science or related field or equivalent years of experience
7+ years of experience in electrical or hardware engineering
Experience in modeling using Python
Ability to travel including domestic and international

Nice To Haves

PhD/MS in a relevant field
Experience with statistical analysis
Hand-on lab experience with power measurement
Experience with standard software performance tooling to help identify bottlenecks
Knowledge of OS and embedded systems fundamentals

Responsibilities

Develop, maintain, and continuously improve a system-level power model
Understand, characterize, and model power consumption for a wide array of system loads
Integrate battery model (ESR) into use-case based run time estimates as well as HW system DCR and grounding requirements
Collaborate with product and system architecture teams to define and model various use cases and translate into quantifiable power profiles
Extract and integrate pre-silicon power estimates and power breakdown data for chips under development
Partner effectively with various submodule teams
Hand-on measurement of power and performance data from prototypes and compare it against model predictions across HW and SW features. Debug discrepancies, identify root causes, and refine models to improve accuracy and predictive capability.
Provide data-driven insights and recommendations to hardware and software teams for power reduction strategies, trade-offs, and design optimizations.
Create and maintain comprehensive documentation for power models, assumptions, methodologies, test procedures, and analysis reports.