Qualcomm-posted about 2 months ago
$164,000 - $246,000/Yr
Full-time • Mid Level
San Diego, CA
5,001-10,000 employees
Computer and Electronic Product Manufacturing

Qualcomm Technologies Inc's Global CAD team develops tools, flows, and methodologies for different aspects of VLSI design. This position is about developing critical CAD tools used in emulation and includes the following activities: Work with industry-standard tools and technologies to develop solutions to a variety of infrastructure needs. Develop critical emulation CAD algorithms that address unique Qualcomm SoC needs (synthesis, partitioning, place and route, clock optimization). Drive compute and storage optimization. Mentor and lead other members of the team

  • Work with industry-standard tools and technologies to develop solutions to a variety of infrastructure needs.
  • Develop critical emulation CAD algorithms that address unique Qualcomm SoC needs (synthesis, partitioning, place and route, clock optimization).
  • Drive compute and storage optimization.
  • Mentor and lead other members of the team
  • Bachelor's degree in Science, Engineering, or related field.
  • 7+ years ASIC design, FPAG design, verification, or related work experience.
  • 7+ years C++ SW development, CAD tool development, or related work experience.
  • Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's or PhD. in Computer Science, Computer Engineering
  • 10+ years of relevant experience
  • 10+ years of direct hands-on experience with C++ and Python
  • 10+ years of hands-on experience with Linux
  • 10+ years of direct hands-on experience with CAD SW development, Proven ability of software design principles, practices, and patterns
  • Demonstratable knowledge of data structures, algorithms and design patterns
  • Experience in the areas of RTL Synthesis (System Verilog -> Netlist), Clock Tree Optimization, Exposure to VLSI design concepts, logic design
  • Excellent interpersonal and analytical skills with the ability to work independently, and create customer-facing applications
  • Experience with the following: Git, LSF, JIRA, GCC and other related technologies
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