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The DSP R D Engineer will be responsible for developing specifications, architecture, and micro-architecture of digital signal processing and communications algorithms. This role involves bit-exact MATLAB/Simulink and C/C++ system modeling and simulation, as well as developing and running system level simulation suites of the copper Ethernet PHY transceivers. The engineer will perform vector matching verification with RTL simulations, define and document chip requirements, architecture, verification, and lab test plans. Additionally, the role includes lab testing and debugging of ASICs, along with documentation/application note development and customer support.