DSP and Wireless Systems Engineer, Digital RF Systems

Amazon•San Diego, CA

17h

About The Position

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role: As a DSP Engineer working in the Digital RF Systems team, you will be responsible for DSP architecture definition, design and simulation of DSP blocks in wireless communication SOC that are used in Leo phased array systems. You will be implementing end-to-end system models including fixed point DSP blocks, RF impairments of the radio, phased array antenna and satellite channel. You will be involved in novel techniques to estimate and correct RF impairments that will be implemented in HW and FW. Based on the system level constraints such as low power and cost, you will develop optimized solutions to support high throughput for our customers. As a DSP Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with internal inter-disciplinary teams such as ASIC/RFIC designers, FW/SW engineers, design verification engineers. You will drive key aspects of the silicon design, validation and RF performance optimization in the lab. In this role you will: · Design and model DSP algorithms such as beamformer, DPD, CFR, digital cancellation schemes and RF impairment compensation blocks · Model RF transceivers impairments and develop RF impairment compensation algorithms . Collaborate with RFIC/analog designers, communication systems and software engineers to drive chip specifications . Develop and optimize HW/SW calibration methods for RF SOC and phased array systems . Architect HW and FW partitioning of calibration algorithms . Develop detailed test plans and test procedures for validation and characterization of RF Wireless SOC performance . Involve in chip bring-up in the lab and optimize conducted and/or OTA throughput performances by collaboratively working with cross functional teams . Characterize and enhance RF performance of the wireless SOC and help integration of the silicon into Leo phased array systems Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Requirements

Experience in developing link and system level simulators using MATLAB, Python, or C++
5+ years of relevant experience in wireless DSP/RF systems engineering (LTE, 5G-NR, WiFi 802.11, BLE)
In depth knowledge of DSP design for low power consumption ASIC
Good understanding of RF blocks and components
Experience in RF impairment estimation and compensation techniques
Working knowledge of FW implementation of various DSP algorithms
Experience in using lab equipment, bring-up and validation of chip

Nice To Haves

Master's degree in Electrical or Communications Engineering or a related field
Experience with current and upcoming RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards
Strong background in Communication Theory (signal estimation and detection, AGC, channel estimation), OFDM, MIMO, Digital/Wireless Communication Systems and engineering
Extensive experience in designing low power/area digital signal processing blocks for Wireless RF SOCs
Excellent understanding of RF architectures and blocks used in the Wireless SOCs
MATLAB, Python, C++ experience with emphasis on fixed point modeling of DSP blocks, RF impairment modeling, RF calibration algorithm development, system performance simulations (EVM, ACRL, OOB emissions)
Experience with bit-accurate modeling to match RTL implementations, emulations, FW development
Familiarity with phased array systems and phased array performance optimization techniques
Experience in silicon bring-up in the lab and using lab equipment such as vector spectrum analyzer, signal generators, high speed scopes and logic analyzers

Responsibilities

Design and model DSP algorithms such as beamformer, DPD, CFR, digital cancellation schemes and RF impairment compensation blocks
Model RF transceivers impairments and develop RF impairment compensation algorithms
Collaborate with RFIC/analog designers, communication systems and software engineers to drive chip specifications
Develop and optimize HW/SW calibration methods for RF SOC and phased array systems
Architect HW and FW partitioning of calibration algorithms
Develop detailed test plans and test procedures for validation and characterization of RF Wireless SOC performance
Involve in chip bring-up in the lab and optimize conducted and/or OTA throughput performances by collaboratively working with cross functional teams
Characterize and enhance RF performance of the wireless SOC and help integration of the silicon into Leo phased array systems