DRAM Technology Modeling Engineer

Applied Materials • Santa Clara, CA

2d • Onsite

About The Position

Who We Are Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world – like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world. What We Offer Salary: $179,500.00 - $246,500.00 Location: Santa Clara,CA You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible—while learning every day in a supportive leading global company. Visit our Careers website to learn more. At Applied Materials, we care about the health and wellbeing of our employees. We’re committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits. Applied Materials is the leader in materials engineering solutions to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. Our innovations make possible™ the technology shaping the future. To achieve this, we employ some of the best, brightest, and most talented people in the world who work together as part of a winning team. Key Responsibilities We are working on exciting projects, connecting materials to systems, to drive new innovations that enable a wide range of advanced Logic-Memory devices and technologies, and associated material and processes interactions. You can be part of this cutting-edge modeling and design team, where you will have the opportunity to model and simulate new technologies that answers the continuous demands for scaled devices, denser interconnects that significantly improves the system Power, Performance and Area. Your primary responsibility will be developing various process and device models using Technology Computer-Aided Design (TCAD) to enable predictive analysis of emerging memory especially DRAM and future 2nm technologies (deep sub-submicron FET architectures, including nanowires and Finfet). You will also be developing calibration simulations and hardware correlations. You will be directly interacting with a talented and diverse multi-national team of AMAT technical staff to identify and address key issues to improve performance and scalability.

Requirements

• Master’s or PhD degree in Electrical Engineering, Applied Physics or Material Sciences
• Strong fundamental understanding of solid state device/semiconductor physics
• Deep experience in process and device modeling (TCAD)Sentaurus Process/Device/Interconnect Sentaurus Process Explorer/Raphael Sentaurus Topo Silvaco’s Victory Process and Victory Device tools
• Experience in advanced CMOS model development and calibration to hardware
• Strong problem-solving abilities in interdisciplinary areas
• Ability to present scientific and/or experimental results in a concise and convincing manner
• Desire to stay up to date with industry challenges and recent advancements in transistor/interconnect technologies
• Ability to work independently and in cross functional teams
• Passionate and highly motivated to learn new things
• Excellent written and verbal communication skills

Nice To Haves

• Leadership skills is a plus

Responsibilities

• developing various process and device models using Technology Computer-Aided Design (TCAD) to enable predictive analysis of emerging memory especially DRAM and future 2nm technologies (deep sub-submicron FET architectures, including nanowires and Finfet)
• developing calibration simulations and hardware correlations
• directly interacting with a talented and diverse multi-national team of AMAT technical staff to identify and address key issues to improve performance and scalability

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees