Distinguished Memory PHY Architect

Advanced Micro Devices, Inc • Folsom, CA

5h

About The Position

At AMD, the mission is to build great products that accelerate next-generation computing experiences across various domains like AI, data centers, PCs, gaming, and embedded systems. The company fosters a culture of innovation, collaboration, bold ideas, human ingenuity, and a shared passion for creating extraordinary things. Joining AMD means being part of a culture that pushes innovation limits to solve important challenges, striving for execution excellence, and being direct, humble, collaborative, and inclusive. The role involves leading a logic design team responsible for implementing state-of-the-art PHY memory IPs in advanced CMOS processes, covering RTL design, and close interaction with DV, Firmware, and SoC Integration teams. This position is for a senior leader.

Requirements

• Proven track record of delivering complex RTL PHYS and subsystems to SoCs
• Good technical knowledge and experience of memory PHYs
• Good understanding of RTL quality design in mixed signal PHYs
• Strong and effective communication skills with teams and customers worldwide
• Effective at leading and getting results
• Strong cross functional project management skills
• Relevant academic background

Nice To Haves

• Demonstrated ability to lead implementation of high-quality RTL for state-of-the-art memory PHYs
• Demonstrated ability to recruit and lead teams of engineers
• Master degree
• 15 years’ progressive experience

Responsibilities

• Lead design team, responsible for driving the implementation of future IP
• Work with other teams including domain and team leads as architects, DV, FW, SOC, and support debug as needed to ensure interlocked execution
• Provide additional over-all design mentorship and contribution to shared methodologies across interface IP and PHY design teams

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Number of Employees: 5,001-10,000 employees