Director, Product Applications Engineering

Astera Labs•San Jose, CA

3h•$215,000 - $260,000

About The Position

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. Astera Labs is seeking an experienced Director of Applications Engineering to join our team in San Jose, CA. This role will build and lead a team of our applications engineering function, focusing on the debug, development and integration of semiconductor products for high-speed interfaces, including PCIe/CXL and UALink. Job Description: As the Director of Applications Engineering at Astera Labs, you will:

Requirements

Advanced academic and technical background in electrical engineering. A Master’s degree or higher is strongly preferred.
10+ years of experience in designing and integrating complex SoC/silicon products with high-speed interfaces.
5+ years of experience in a leadership role managing applications engineering teams.
Proven ability to lead and manage multiple projects simultaneously, with strong organizational and strategic planning skills.
Entrepreneurial mindset with a customer-centric approach and the ability to drive innovation and strategic initiatives.
Extensive experience with silicon/system bring-up, debug, and issue resolution. Demonstrated success in directing internal teams and managing customer communications.
Deep technical expertise in post-silicon debugging of Analog/Mixed Signal IC and SERDES IP, as well as vendor and customer experience management.
Deep technical expertise in analog filtering and digital signal processing techniques
Deep technical expertise in high-speed interfaces, including recent experience with PCIe Gen5/6/7.
Proficient in technical writing, with a track record of producing clear and precise documentation for both internal and external audiences.

Nice To Haves

Experience triaging complex customer-reported issues involving multiple layers such as silicon, firmware, hardware design, and system environment.
Background in the development/support of PCIe or Retimer products.
Hands-on experience with lab equipment, including protocol analyzers, high-speed oscilloscopes, and BERTs.
Proficiency in software/firmware development and scripting, including C-language and Python.
Understanding of data center systems, such as servers, AI platforms, JBOGs/JBODs, and networking switches/routers.

Responsibilities

Team Leadership: Build, mentor, and manage a high-performing team of applications engineers. Foster a culture of innovation, collaboration, and continuous improvement.
Customer Engagement: Cultivate and maintain strong relationships with key customers. Oversee the technical support and engagement process to address and resolve complex design challenges.
Innovation and Collaboration: Lead cross-functional initiatives to drive product and process improvements. Provide strategic feedback to internal teams, including R&D and product management, to enhance product offerings and drive innovation.
Technical Oversight: Guide the technical direction of high-speed interface solutions at a system level. Ensure the team delivers high-quality technical collateral, such as application notes and system integration guides.