Director for Design Verification

Marvell Technology•Santa Clara, CA

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc.

Requirements

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 20+ years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 15+ years of experience.
Strong understanding of ASIC development process.
Proven record as Verification Lead on Complex ASIC SOCs.
Demonstrated track record of delivering high quality ASICs.
Good understanding of SoC architecture, processor cores, memory, and peripheral interfaces.
Strong understanding of Modern Verification Methodology, UVM and System Verilog.
Excellent communication, interpersonal and presentation skills.
Strong cross-functional leadership skills.
Highly motivated, self-driven and curiosity to learn new technologies.

Responsibilities

Lead DV, emulation and post silicon validation execution with zero defect mindset on large ASIC programs.
Define DV, emulation and post silicon validation scope.
Define execution timelines working closely with stakeholders.
Set goals, monitor schedules, and take steps to keep the execution on track.
Define DV methodology and verification strategies.
Drive definition and implementation of DV TB architectures.
Collaborate with Architecture, Design, DFT, PD, FW and system teams for successful product execution.
Lead tool evaluation and selection.
Drive continuous productivity improvements through incremental and forklift changes.
Monitoring industry DV trends and adapting to key trends.
Hire, build and retain high performance engineering team.
Address continuous training and development needs of the team.