Digital IC design Engineer

Marvell•Santa Clara, CA

47d

About The Position

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Hardware Design Senior Staff Engineer with Marvell, you'll be a member of the Custom compute and solutions group. Our design team works on state-of-the-art datacenter and AI SOCs. As a member of the R&D team, you will design world-class hardware for the industry's largest customers. This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates. What You Can Expect In this role, you will:

Requirements

Bachelor's degree in computer science, Electrical Engineering, or related fields, and 12+ years of related professional experience. Or a Master's degree in computer science, Electrical Engineering, or related fields with 10+ years of experience. Or a PhD in Computer Science, Electrical Engineering, or related fields with 8+ years of experience.
Fluent in System Verilog RTL coding techniques.
Familiar with modern SoC architectures and various interface technologies such as AXI, HBM, Ethernet, PCIe, and D2D.
Experience in micro-architecture of complex custom/ASIC products, focusing in one or more of the following areas: NPU, embedded processors, DSP, graphics, and general-purpose microprocessors.
RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification.
Experience in implementation/timing closure for high-speed design.

Nice To Haves

Hands-on experience for all aspects of the chip-development process, with proficiency in front-end design tools and methodologies, is a plus.
Experience in designing high-speed (>1 GHz)/high-performance embedded processor SOC products is a plus.
Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell is desirable.

Responsibilities

Define the micro-architecture of SoCs, including its blocks, cores, accelerators, and subsystems.
Work closely with the architecture, floor planning, backend, verification, DFT, STA teams, and other cross-functional teams to produce high-quality hardware.
Develop and write micro-architectural specifications of the design.
Implement designs using good RTL coding and low power techniques.
Collaborate with the backend team to close on synthesis, place and route, and timing signoff.
Collaborate with the verification team on pre-silicon verification tasks such as reviewing test plans, coverage closure, and full-chip simulation debug.
Plan, scope, and time tasks with the project manager.
Work with post post-silicon group to resolve any lab issues and successfully bring up silicon.
Collaborate with the software team to ensure customer use cases requirements are met.

Benefits

At Marvell, we offer a total compensation package with a base, bonus and equity.
Health and financial wellbeing are part of the package.
That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer.
Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

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