Meta-posted 3 months ago
$114,000 - $133,000/Yr
Full-time • Entry Level
Sunnyvale, CA
Computing Infrastructure Providers, Data Processing, Web Hosting, and Related Services

Reality Labs (RL) focuses on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. We are growing our Graphics ASIC Design and µArchitecture team within RL and are seeking engineers at all levels who will work with a world-class group of researchers and engineers using your digital design skills to implement and contribute to the development and optimization of low power graphics accelerators and state-of-the-art SoCs.

  • Contribute to ASIC digital µArchitecture and design for low-power rendering hardware accelerator
  • Assist performance/power analysis of the design and help meet the power and performance targets
  • Work with architects to map algorithms onto the hardware
  • Support hand-off and integration of blocks into larger SoC environments
  • Work across disciplines, brainstorm big ideas, build new methodologies
  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
  • Knowledge of VHDL, Verilog or SystemVerilog
  • Knowledge of Logic Design Fundamentals
  • Must obtain work authorization in the country of employment at the time of hire, and maintain ongoing work authorization during employment
  • Experience in SoC integration and ASIC architecture
  • Knowledge of microcontrollers and DSP
  • Experience with graphics & display algorithms or accelerator architecture
  • $114,000/year to $133,000/year + bonus + equity + benefits
  • Individual compensation is determined by skills, qualifications, experience, and location.
  • In addition to base compensation, Meta offers benefits.
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