Digital Design Engineer, Principal

Marvell • Santa Clara, CA

28d

About The Position

The Switch Business Unit in Marvell designs and develops the next generation AI datacenter System-On-Chip switch processors on leading edge process technology. We develop the architecture, collaborate on IP development, create the physical design, and work with the world's leading AI data center and enterprise companies to bring next generation networking to reality. As a Principal Design Engineer, you will be at the forefront of innovation-driving micro-architecture and RTL development while spearheading HW/SW co-design efforts that power the next generation of AI datacenter technologies. Collaborating with world-class, cross-functional teams, you'll play a critical role in shaping cutting-edge System-on-Chip (SoC) solutions that set new standards for performance and efficiency.

Requirements

• Bachelor's degree in Computer Science, Electrical Engineering, or a related field with 10-15 years of hands-on industry experience, or a Master's/PhD with 5-10 years of groundbreaking work in digital IC design.
• Deep, practical knowledge of System-on-Chip architecture, including processor cores, memory subsystems, and peripheral interfaces gained through real-world design challenges.
• Extensive experience creating and optimizing Verilog RTL, with expertise in Spyglass for thorough LINT and Clock Domain Crossing (CDC) checks to ensure flawless implementation.
• Skilled in Perl and Python, using scripting to accelerate workflows, enhance efficiency, and tackle complex design tasks.
• A track record of delivering production-quality designs on aggressive schedules, demonstrating exceptional problem-solving and innovation under pressure.
• In-depth knowledge of IEEE 802.3 Ethernet standards, ensuring cutting-edge performance and industry compliance in high-speed networking solutions.

Responsibilities

• Lead Micro-Architecture Vision: Architect and develop advanced SoC designs, including high-value IP blocks such as Ethernet MAC, PCS, and packet processing engines, to enable next-generation networking performance.
• Deliver Complex, High-Performance Solutions: Partner with architects and verification engineers to design, validate, and optimize sophisticated, timing-critical systems-mastering every stage of the SoC front-end design flow, from timing closure to power optimization.

Benefits

• At Marvell, we offer a total compensation package with a base, bonus and equity.
• Health and financial wellbeing are part of the package.
• That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Industry: Computer and Electronic Product Manufacturing
• Number of Employees: 5,001-10,000 employees