Digital Circuit Design Engineer
About The Position
Key Responsibilities: Design and implement sensor timing control logic and contribute to ISP system-level integration Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs Integrate and validate ISP data paths based on PRD, design specifications, and overall SoC architecture Collaborate closely with CIS project leads and sensor digital/analog engineers for system integration and validation Work with physical design teams on floor planning, timing closure, and DFT implementation Perform full-chip integration and verification Support chip bring-up, validation, and silicon debugging Collaborate with algorithm and application engineers on image tuning, optimization, and qualification Support silicon validation, debugging, and image quality tuning through production readiness Qualifications: M.S. in Electrical Engineering or equivalent experience Strong experience with ASIC design flow, including RTL design, simulation, synthesis, STA, formal verification, and DFT Deep understanding of end-to-end chip development: specification, architecture, low-power design, tape-out, silicon validation, debugging, mass production, and customer support Solid knowledge of image sensor performance metrics, ISP architectures, and camera system integration Experience with image sensors and camera systems is a strong plus Annual base salary for this role in California, US is expected to be between $110,600 - $140,000. Actual pay will be determined on several factors such as relevant skills and experience, and the pay of employees in the similar role. EOE/Minorities/Females/Vet/Disability
Requirements
- M.S. in Electrical Engineering or equivalent experience
- Strong experience with ASIC design flow, including RTL design, simulation, synthesis, STA, formal verification, and DFT
- Deep understanding of end-to-end chip development: specification, architecture, low-power design, tape-out, silicon validation, debugging, mass production, and customer support
- Solid knowledge of image sensor performance metrics, ISP architectures, and camera system integration
Nice To Haves
- Experience with image sensors and camera systems is a strong plus
Responsibilities
- Design and implement sensor timing control logic and contribute to ISP system-level integration
- Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs
- Integrate and validate ISP data paths based on PRD, design specifications, and overall SoC architecture
- Collaborate closely with CIS project leads and sensor digital/analog engineers for system integration and validation
- Work with physical design teams on floor planning, timing closure, and DFT implementation
- Perform full-chip integration and verification
- Support chip bring-up, validation, and silicon debugging
- Collaborate with algorithm and application engineers on image tuning, optimization, and qualification
- Support silicon validation, debugging, and image quality tuning through production readiness
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Mid Level
