Digital ASIC Micro Architect Design Engineer

Google-posted about 1 year ago
$150,000 - $223,000/Yr
Full-time • Mid Level
Mountain View, CA
10,001+ employees
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The Digital ASIC Micro Architect Design Engineer at Google will be part of a diverse team focused on developing custom silicon solutions for Google's direct-to-consumer products. This role involves contributing to the innovation of hardware experiences that deliver exceptional performance and efficiency. The engineer will work on designing and architecting low power SoC hardware IP, collaborating with cross-functional teams to create advanced technologies that enhance computing capabilities.

  • Develop system Verilog RTL to implement reasoning for ASIC or SoC products according to next-generation architecture specifications.
  • Design digital verification of digital design blocks and interact with architects to identify important verification scenarios.
  • Perform detailed data analysis and trade-off evaluations to improve hardware architecture solutions.
  • Define and deliver hardware IP architecture specifications that meet power, performance, area, and image quality targets, owning the goals through to tape-out and product launch.
  • Collaborate with SoC and system architects to meet dynamic power, performance, and area requirements for multimedia use cases.
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 5 years of experience in computer architecture concepts, including microarchitecture, multimedia architecture, and silicon design.
  • Experience architecting and designing low power SoC hardware IP in areas such as Camera ISP, video codecs, display, computer cores, and machine learning accelerators.
  • Experience in ASIC development methodology and Verilog RTL development as per project demands.
  • Experience collaborating cross-functionally with system and hardware architecture, IP design and verification, multimedia, and machine learning algorithm and software development teams.
  • Familiarity with interconnect or fabric, security, and multi-level caching architectures.
  • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science with an emphasis on computer architecture.
  • Health insurance
  • Dental insurance
  • Vision insurance
  • 401(k) plan
  • Paid holidays
  • Paid time off
  • Employee stock purchase plan
  • Tuition reimbursement
  • Professional development opportunities
  • Flexible scheduling
  • Wellness programs
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