Qualcomm-posted about 1 year ago
$122,500 - $183,700/Yr
Full-time • Mid Level
Austin, TX
Computer and Electronic Product Manufacturing

As a DFT Engineer at Qualcomm, you will collaborate with chip architects, designers, and test engineers to verify the Design for Test (DFT) and Design for Debug (DFD) architecture for mixed signal and digital VLSI designs. This role involves ensuring the successful implementation of a new chip architecture, providing you with the opportunity to influence the design from the ground up.

  • Create test vectors or oversee their creation
  • Validate DFT requirements are being met
  • Work with designers to increase test coverage, debug observability and flexibility
  • Verify post-PD designs meet DFT requirements
  • Work with test personnel, stepping in to do run tests when needed
  • BA/BS degree in Electrical/Computer Engineering with 3+ years of practical experience
  • Strong fundamentals in digital ASIC design; experience using Verilog or VHDL
  • Experience with ASIC test, DFT, and debug
  • 3+ years of practical experience with test or DFT
  • Experience using the Mentor Tessent tools
  • Experience with defining and implementing SOC level verification on large designs
  • Experience in TCL, Perl/Python and Shell scripting
  • Hands-on expertise with commercial test generation tools for large complex designs
  • Strong fundamental knowledge of DFT techniques including JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST, LBIST
  • Experience running test compression software
  • Strong sense of ownership, self-driven
  • Competitive annual discretionary bonus program
  • Opportunity for annual RSU grants
  • Comprehensive benefits package designed to support success at work, at home, and at play
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