Design Verification Manager

About the position

Do you enjoy working in a creative fast-growing entrepreneurial environment? With indie you´ll never walk alone! We place high value on our teams and pursue excellence for our employees and customers! indie is empowering the Autotech revolution with next generation automotive semiconductors and software platforms. We focus on edge sensors spanning multiple modalities including LiDAR, radar, ultrasound and vision for Advanced Driver Assistance Systems (ADAS), autonomous vehicles, connected car, user experience and electrification applications. indie's Vision team is dedicated to creating power-efficient System-on-Chip (SoC) ASIC products for the automotive market, supporting key applications in Advanced Driver Assistance Systems (ADAS). As a Design Verification Manager within our Vision team, you will play a key role in bringing cutting-edge SoCs to the automotive market.

Responsibilities

• Lead and manage a multi-site engineering team focused on pre-silicon design verification.
• Collaborate with architects and design engineers to define verification requirements.
• Establish and drive verification methodologies for ADAS silicon roadmaps.
• Develop and execute verification and test plans.
• Ensure functional verification closure and achieve coverage goals.
• Support FPGA validation and post-silicon bring-up activities.
• Implement and maintain continuous improvement processes using tools like Jenkins.
• Mentor junior engineers and interns.

Requirements

• Bachelor's degree in Electrical, Electronics, or Computer Engineering (Master’s preferred).
• 15+ years of hands-on experience in SoC verification and validation.
• Proven track record across multiple advanced technology node SoC development cycles.
• Strong understanding of ARM and Tensilica processor architectures.
• Expertise in industry-standard bus protocols and interfaces.
• Knowledge of Network-on-Chip (NoC) architectures for ASIC data planes.
• Experience with low-power verification methodologies (UPF/CPF).
• Proficiency in SystemVerilog, C/C++, Python/Perl, and UVM methodology.
• Familiarity with automotive functional safety and reliability is highly desirable.
• Excellent communication and leadership skills.