Design Verification Intern - Master's Degree

Marvell-posted about 2 months ago
$27 - $53/Yr
Intern
Morrisville, NC
5,001-10,000 employees
Computer and Electronic Product Manufacturing
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Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. The Custom Cloud Solutions Engineering ASIC Design Team within Marvell provides chip solutions for next generation 5G carriers, cloud data centers, enterprise applications. As a member of the ASIC Design Verification team, you will have the opportunity to develop and grow your skills in the areas verification testbench with UVM Methodology, verification component design and testing of specific system-on-a-chip (SOC) designs at block/cluster/full chip levels.

  • Verifying complex SoCs through simulation of register-transfer level (RTL) and gate level designs using industry standard tools and processes
  • Collaborate closely with design and other verification engineers to develop and implement verification test plans and drive verification methodology work
  • Develop constrained-random verification test environment using Verilog/System Verilog, UVM and C programming, including testbenches, checkers, monitors, drivers and and other testbench components
  • Use problem solving skills to debug failing simulations and create test vectors and testing scenarios to exhaustively exercise a design
  • Drive and analyze test coverage metrics
  • Utilizes technical abilities and sound communication skills to implement and manage verification deliverables to customers
  • Currently pursuing a Bachelor's or Master's Degree in Computer Science, Electrical Engineering, or related fields
  • Knowledge of advance digital design, CPU design and computer architecture
  • Experience with industry standard simulators such as Cadence Incisive, Synopsys VCS or Questasim
  • Experience with HDLs such as VHDL, Verilog or SystemVerilog
  • Experience in standard verification methodology flows, including developing test plans, building testbenches and generating test cases
  • Experience programming in C or C++ and in scripting using Python, PERL or Bash
  • Experience with industry standard interfaces and peripherals
  • Great problem solving and critical thinking skills
  • Good written and verbal communication skills
  • Self-starter, goal oriented and a team player
  • medical, dental and vision coverage
  • perks and discount programs
  • wellness & mental health support including coaching and therapy
  • paid holidays
  • paid volunteer days
  • paid sick time
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