Design Verification Intern

Renesas Electronics • Duluth, GA

22h • Hybrid

About The Position

Summer 2026 Internship - May 26 - August 14
Duluth, GA - Hybrid
Must be currently enrolled full time in a university degree program pursing a bachelor, master, or PhD degree. Must not have graduated before September 2026.
Renesas looking for a talented EE graduate student to join our team as a Design Verification Intern in our Duluth/Johns Creek, Georgia office. In this role, you will collaborate closely with analog and digital designers to verify the design in a simulation environment. You will be responsible for understanding verification environments for these complex IC designs.

Requirements

• Must be currently enrolled full time in a university degree program pursing a bachelor, master, or PhD degree. (MSEE/PHD preferred)
• Must not have graduated before September 2026.
• Familiar with at least one coding language: Verilog, System Verilog, UVM concepts.
• Strong problem-solving abilities.
• Must have good written and verbal cross-functional communication skills.
• Must be a team player and yet be an independent thinker with strong design fundamentals.

Responsibilities

• Interact with digital and analog engineers to understand the basic functions of a DDR5.
• Actively assist in all stages of product development including specification, Digital and Analog Design Verification and Silicon debugging.
• Support coding of simulation infrastructure using Verilog, System Verilog, UVM, Python, and Perl.
• Set up and maintain Verification Environment, Develop, and Verify self-tested test benches.
• Work closely with cross-functional teams within the DDR5 development process.
• Participate in regular meetings and provide updates on project progress.
• Prepare reports and presentations to communicate findings and progress.

What This Job Offers

• Career Level: Intern