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Seize the opportunity to work with the team responsible for RTL logic design and verification of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLIPS is responsible for developing soft IPs, subsystems and gaskets for Client Computing Group projects. This job requisition is to seek an experienced, disciplined and collaborative IP design verification engineer in Folsom, California. As a member of the Chipsets Logic Design Verification team, you will work closely with IP architects to define and develop verification testbench and building RTL models for verification. You will verify the functionality of new architectural features using both functional and formal verification methods of next generation designs by developing test plan, tests content or test tools.
