Design Verification Engineer (NW-64000826)

Cirrus LogicAustin, TX
21hHybrid

About The Position

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldn’t do it without our extraordinary workforce – and that’s where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career! We are looking for an experienced, creative, and innovative engineer to join our world-class Design Verification team. You will have a unique opportunity to work and gain competence in several areas such as Block and Chip-Level ASIC functional verification, formal verification, test-bench development, HW emulation, HW acceleration, SW driven verification. You will be part of a dynamic team where there will be opportunities for learning, innovating, working on new designs, and much more.

Requirements

  • Bachelor’s degree in Electrical or Computer Engineering and 7+ years of experience working on block-level or chip-level design verification for ASICs.
  • Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/UVM, OVM, AVM, Vera)

Nice To Haves

  • Master’s degree in Electrical or Computer Engineering and 5+ years of experience working on block-level or chip-level design verification for ASICs.
  • Able to work closely with digital/analog designers, applications engineers, and manufacturing test to support both pre-silicon verification and post-silicon validation efforts
  • Knowledge of signal processing and Verilog Assertions
  • Ability to create, evaluate, debug, and improve verification processes
  • Ability to mentor junior engineers in verification methodology

Responsibilities

  • Functional verification on custom mixed-signal ASICs
  • Developing detailed verification plans, methodology, and test-bench infrastructure
  • Developing constraint-random and directed tests, scoreboards, and checks
  • Coverage implementation, analysis, and closure
  • You will perform regression triage, failure analysis, and resolution
  • Running gate-level simulations, analyzing and resolving fails and timing violations
  • Working closely with digital/analog designers, systems, applications, and manufacturing test engineers to support both pre-silicon verification and post-silicon validation efforts
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