Design Verification Engineer - Methodology Expert

Advanced Micro Devices, Inc • Folsom, CA

6h • Onsite

About The Position

At AMD, the mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. The company fosters a culture of innovation and collaboration, believing that progress comes from bold ideas, human ingenuity, and a shared passion. Joining AMD means experiencing a culture that pushes innovation limits to solve important challenges, striving for execution excellence, while being direct, humble, collaborative, and inclusive. The role is for an experienced Verification Methodology Expert to join the team as a Technical Lead for cutting-edge server memory products. This individual will be responsible for driving verification methodology flows across a range of DIMMs (Dual In-line Memory Modules). The ideal candidate will possess expert-level knowledge of SystemVerilog, UVM, C/C++, and scripting languages like Python/Perl, and will have a proven track record of deploying industry standard verification flows from scratch.

Requirements

• Expert-level knowledge of SystemVerilog, UVM, C/C++, and scripting languages like Python/Perl
• Proven track record of deploying industry standard verification flows from scratch
• Excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc.
• Highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you
• Developed and implemented SystemVerilog and UVM (Universal Verification Methodology) based testbenches, simulation environments, and functional coverage models for DDR5 and LPDDR5 systems
• Worked closely with hardware, firmware, and software teams to align on system-level memory architecture, identify potential integration issues, and define validation requirements early in the design phase
• Provided technical leadership across multiple teams, driving cross-functional collaboration to solve complex issues in memory systems, from firmware to hardware
• GLS, NLP, XPROP simulation experience is required
• Strong proficiency in system verilog assertions, constraints and coverage
• Worked in formal verification methods, with proven record of tool usage beyond the standard apps
• Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies

Nice To Haves

• Built VIPs and BFMs for memory interfaces from scratch
• Working knowledge of DFT flows

Responsibilities

• Technical Leadership in setting up verification flows and methodologies for regression optimization, simulation time reduction using up to date industry standard tools and flows
• Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all features of the memory interface
• Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
• Knowledge sharing and other contributions to verification methodology
• As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests
• Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs
• Support Post-Si teams for Product Performance, Power and functional issues debug/resolution

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Number of Employees: 5,001-10,000 employees