Design Implementation Engineer-Synthesis

QualcommSan Diego, CA
86d$161,800 - $242,600

About The Position

The Design Implementation Engineer will work in Qualcomm's Adreno GPU team and will be responsible for managing all aspect of front end implementation design challenges and methodology. As a member of the Graphics team, the successful applicant will integrate, implement and deliver state of the art GPU cores and will be working closely with the graphics microarchitecture and physical design teams to push and meet very aggressive Power, Performance and Area (PPA) targets. This role is a hands on role which include working with execution driven teams for tape-outs by supporting new methodologies and new flows required to address better PPA. The successful candidate will possess in-depth understanding of ASIC design flow and the challenges posed by advanced deep sub-micron technologies.

Requirements

  • Bachelor's degree in Electrical/Computer Engineering or related field with 7+ years of direct front end implementation and physical design work experience.
  • Master's degree in Electrical/Computer Engineering or related field with 6+ years of direct front end implementation and physical design work experience.
  • PhD in Electrical/Computer Engineering or related field with 5+ years of direct front end implementation and physical design work experience.
  • Experience with digital design and RTL synthesis.
  • Experience with front end EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime.
  • Strong understanding of CMOS circuit design and design techniques.
  • Ability to think outside the box for innovative solutions to improve power and eliminate performance bottlenecks.
  • Strong understanding of GPU micro-architecture.
  • Solid working knowledge of scripting skills including tcl, perl or python.
  • Excellent communication skills and ability to collaborate in a team environment.
  • Excellent debug and analytical skills.

Nice To Haves

  • Hands-on experience in Physical design implementation.
  • Working knowledge of sub-micron technology process nodes (e.g., 5nm, 4nm and below).
  • Knowledge and experience of graphics design and development.
  • Excellent interpersonal and team skills.
  • Familiar with the latest industry standard EDA tools for synthesis, formal verification, timing analysis and physical design.
  • Solid experience with leading a high performance team to push aggressive PPA targets.
  • Strong background in VLSI design and scripting.

Responsibilities

  • Manage all aspects of front end implementation design challenges and methodology.
  • Integrate, implement and deliver state of the art GPU cores.
  • Work closely with graphics microarchitecture and physical design teams.
  • Support execution driven teams for tape-outs.
  • Address better Power, Performance and Area (PPA) through new methodologies and flows.

Benefits

  • $161,800.00 - $242,600.00 salary range.
  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Highly competitive benefits package designed to support success at work, at home, and at play.
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