Defect & Yield Metrology Engineer

Intel CorporationChandler, AZ
1dOnsite

About The Position

Position Overview We are seeking a motivated and skilled engineer to join our SPTD Yield team as a Micro-contamination Expert and Defect Metrology Engineer. In this role, you will drive innovation in EMIB-T, glass core, EMIB scaling, and panel-level packaging technologies for substrate and assembly test factories serving Intel's IPG and IFS customers. Our mission is to become the supplier of choice for advanced, cost-effective substrate packaging by developing leading-edge systems, process capabilities, and inspection technologies that achieve top yields.

Requirements

  • Bachelor's degree in Electrical Engineering, Chemical Engineering, Optical Engineering, Materials Science, Physics, or related field + 5 years semiconductor experience OR Master's degree in Electrical Engineering, Chemical Engineering, Optical Engineering, Materials Science, Physics + 2 years semiconductor experience OR PhD in Electrical Engineering, Chemical Engineering, Optical Engineering, Materials Science, Physics + 1+ years semiconductor experience
  • Experience with yield analysis, JMP/Python scripting, and equipment troubleshooting
  • Experience in micro-contamination management within semiconductor manufacturing
  • Experience as a yield or defect reduction owner with prior defect metrology tool ownership

Nice To Haves

  • Experience statistics and experimental design with application to tool qualification and process development
  • Experience with semiconductor process flows and/or defect metrology assessment based on process requirements

Responsibilities

  • Defect Detection & Process Improvement Utilize defect inspection tools to detect and resolve process issues
  • Collaborate with defect reduction, process integration, and module teams to improve yield
  • Apply real-time data analysis, reporting, and DOE summaries to guide improvements and decision-making
  • Micro-contamination Expertise Apply advanced contamination detection and control strategies to maintain substrate and process quality
  • Lead efforts to monitor and reduce contamination, ensuring high yield and quality standards
  • Maintain flexibility and adaptability to support evolving demands in micro-contamination management
  • Tool Installation & Development Direct next-generation tool installation through major milestones: p-spec development, source inspection, design, prefac, SL1/SL2, IQ, SQ, and MRCL
  • Collaborate with diverse stakeholders throughout the installation process
  • Independent Leadership & Problem-Solving Manage work independently with minimal supervision
  • Proactively identify and resolve issues
  • Provide leadership in both defect metrology and micro-contamination initiatives
  • Factory Operations & Equipment Management Work with factory teams and module partners to maintain WIP velocity targets
  • Develop and implement procedures and equipment setups for defect metrology tools
  • Set up data flows for new tools by connecting them to automation and yield analysis systems
  • Strategic Planning & Collaboration Create equipment roadmaps supporting capabilities that match program requirements for new substrate technologies
  • Collaborate with equipment suppliers and GSEM partners to maintain and enhance current toolsets
  • Present critical tool and system capabilities to APTM leadership

Benefits

  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel.

Stand Out From the Crowd

Upload your resume and get instant feedback on how well it matches this job.

Upload and Match Resume

What This Job Offers

Job Type

Full-time

Career Level

Mid Level

Number of Employees

5,001-10,000 employees

© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service