DDR SW Systems Lead, Principal Engineer

QualcommSan Diego, CA
83d$181,400 - $272,200

About The Position

Headquartered in San Diego, for over 40 years Qualcomm's inventions have inspired others to make the impossible, possible. From 5G to artificial intelligence, IoT to automotive and extended reality applications, Qualcomm is inventing the technologies of an intelligently connected future, spearheading research efforts for the next global wireless standard, and collaborating with industry leaders in the wireless value chain to make this future a commercial reality. You're bringing skills. We'll provide the environment and the experience to push your limitless potential. You will be part of an exciting team in Central Hardware System Group working on the latest generation of QUALCOMM's Snapdragon Products. The successful candidate will exhibit strong technical and interpersonal skills for interacting with Hardware and Software engineers. The charter of the CHS DDR SW Systems team is to ensure that the end-product qualifies the defined acceptance criteria for DDR (in terms of stability, meeting Power and performance numbers). The team is looking for a candidate who has strong background on Firmware/Embedded/RTOS concepts, with an understanding of HW concepts and ability to drive DDR System Level failures. The candidate is expected to be self-driven to quickly get up to speed on various stability aspects of the software and flexible to take-up tasks as per the project needs. The position involves understanding of Server SOC Architecture and DDR Subsystem which includes understanding of LPDDR5X, LPDDR6, DDR5 and DDR6 design and PMIC system architecture, and analyzing system SW crash dumps & identifying root cause of stability issues (such as memory corruptions, Memory Lock-ups, Bit flips etc.) reported by different SW groups. The candidate would have opportunity to interact with multiple SW & HW teams to understand DDR System Architecture & follow-up on the issues for the DDR defects found. Apart from getting to understand and debug system level issues, this position is expected to give an exposure to understand various quality stages from product development to commercial launch of the product. The candidate is also expected to guide on the server DDR specific tools developed by the team to catch issues in HW and SW.

Requirements

  • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Software Applications Engineering, Software Development experience, or related work experience.
  • Master's degree in Engineering, Information Systems, Computer Science, or related field and 7+ years of Software Applications Engineering, Software Development experience, or related work experience.
  • PhD in Engineering, Information Systems, Computer Science, or related field and 6+ years of Software Applications Engineering, Software Development experience, or related work experience.
  • 4+ years of experience with Programming Language such as C, C++, Java, Python, etc.
  • 4+ years of experience with debugging techniques.

Nice To Haves

  • 15+ years of industry experience in Device drivers.
  • Embedded software development in C, C++ and/or assembly.
  • Experience with JTAG, logic analyzers and Oscilloscopes for on-chip debugging.
  • Previous experience in platform bring-up (pre-silicon/post-silicon).
  • Knowledge in scripting languages (e.g., Perl, Python, etc.).
  • Good understanding of real-time operating systems.
  • Familiarity with boot loader functionality.
  • Excellent critical thinker with sharp debugging skills.
  • Excellent communication and collaborative skills.

Responsibilities

  • Interact with Hardware and Software engineers.
  • Ensure that the end-product qualifies the defined acceptance criteria for DDR.
  • Drive DDR System Level failures.
  • Analyze system SW crash dumps and identify root causes of stability issues.
  • Understand Server SOC Architecture and DDR Subsystem.
  • Follow-up on issues for the DDR defects found.
  • Guide on server DDR specific tools developed by the team.

Benefits

  • $181,400.00 - $272,200.00 salary range.
  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Highly competitive benefits package designed to support success at work, at home, and at play.
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