DDR and D2D PHY System Design Engineer (San Diego)

Qualcomm•San Diego, CA

63d

About The Position

QCT mixed-signal IP design team is looking for skilled system architect to help design high-speed, high-performance and low-power LPDDR and D2D PHYs for Qualcomm's products targeted for 5G, AI/ML, compute, and automotive applications. This role is part of the LPDDR and D2D PHY design team. You'll help with system design, building, and testing-starting from early ideas all the way to final chip production and validation.

Requirements

10+ years in DDR and/or D2D PHY design
Expertise in SOCAMM/DIMM long-channel signal integrity, and power delivery
Strong knowledge of system architecture, link-budgets, trainings, and integration
Solid understanding of design-for-yield and production challenges in high-speed links
Strong communication skills; proven ability to collaborate across global teams
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Nice To Haves

Hands-on experience from architecture through production in server-class designs
System understanding of memory and D2D links for high-performance compute
Experience in latest process technology nodes and mixed-signal designs
Unix/Perl/TCL scripting (must be comfortable with writing scripts)