About The Position
As a member of our CAD team, you will architect, dictate, develop, maintain and enhance custom analog power intent methodology and circuit ERC solutions for our Analog, RF and mixed-signal designs. The role requires you to work with different technology nodes and provide flows/methodologies for the different tool sets. In this highly visible role, your primary responsibilities will include: • Developing innovative solutions on Circuit ERC (Electric Rules checks) or Power Intent analysis leveraging expertise on circuits and programming. • Identify opportunities for optimization, expediting, and enhancing the flow to improve the end-user experience in terms of precise error reporting, false error reduction and automate via ML/AI solutions. • Actively involving yourself in supporting ERC/Power Intent on voltage domain interactions like – supply gating mechanisms, isolation controls, level shifting, switch supplies, virtual domain interactions, power integrity etc. • Closely collaborating with diverse design teams, including Custom Analog, Mixed-Signal, Digital, RF and more, to understand their needs and requirements on circuit ERC and power flows. Applying advanced techniques to address these requirements across multiple products and reduce duplicate design work. • Working in tandem with other domain in CAD, Power, Technology teams to validate their ML-based applications, implement enhancements, and evaluate external vendor packages and solutions from EDA (Electronic Design Automation) providers and open-source.
Requirements
- Experience in Electric Rules Checks (ERC) tools, circuit tracing and/or experience on custom power intent tools, flows and methodology.
- Analog/RFIC design background and/or related CAD/automation support areas involving various technology nodes and tape out.
- Minimum requirement of BS degree and 5+ years of relevant industry experience.
Nice To Haves
- Exposure to leading industry electrical engineering-focused software development project.
- Programming/scripting skills in Perl, Python, TCL, SKILL language, C++ or Shell.
- Ability to provide automations for rapid and dynamic design needs.
- Experience in understanding on the operating principles of common Analog, Digital/SRAM blocks, Spice Modeling in Nano CMOS technologies.
- Experience with custom Schematic/Layout tracing via SPICE/Open Access, power gating techniques, biasing, circuit topologies (power switches, level-shifter, iso), virtual/derived/multi-power domains, standard-cells would be helpful.
- Hands on experience with SVRF, TCL, Liberty/.lib, UPF - IEEE1801, CPF formats with exposure on power intent domain and methodology is a plus.
- Exposure to industry low power tools, Siemens Calibre PERC; Cadence Conformal LEC, Virtuoso Power Manager, Innovus; Synopsys Library compiler, VCLP, Low Power verification is desirable.
- Knowledge of Cadence Virtuoso Framework with experience on front end Schematic composer will helpful.
- Background in SPICE simulation, SOA, device operating conditions, and knowledge of Post-layout extraction is a plus.
- Good written and verbal communication skills, and the ability to collaborate well with cross-functional teams.
Responsibilities
- Developing innovative solutions on Circuit ERC (Electric Rules checks) or Power Intent analysis leveraging expertise on circuits and programming.
- Identify opportunities for optimization, expediting, and enhancing the flow to improve the end-user experience in terms of precise error reporting, false error reduction and automate via ML/AI solutions.
- Actively involving yourself in supporting ERC/Power Intent on voltage domain interactions like – supply gating mechanisms, isolation controls, level shifting, switch supplies, virtual domain interactions, power integrity etc.
- Closely collaborating with diverse design teams, including Custom Analog, Mixed-Signal, Digital, RF and more, to understand their needs and requirements on circuit ERC and power flows. Applying advanced techniques to address these requirements across multiple products and reduce duplicate design work.
- Working in tandem with other domain in CAD, Power, Technology teams to validate their ML-based applications, implement enhancements, and evaluate external vendor packages and solutions from EDA (Electronic Design Automation) providers and open-source.
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees
