About The Position
Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices! As a member of our CAD team, you will architect, dictate, develop, maintain and enhance custom analog power intent methodology and circuit ERC solutions for our Analog, RF and mixed-signal designs. The role requires you to work with different technology nodes and provide flows/methodologies for the different tool sets. DESCRIPTION In this highly visible role, your primary responsibilities will include: • Developing innovative solutions on Circuit ERC (Electric Rules checks) or Power Intent analysis leveraging expertise on circuits and programming. • Actively involving yourself in supporting ERC/Power Intent on voltage domain interactions like – supply gating mechanisms, isolation controls, level shifting, switch supplies, virtual domain interactions, power integrity etc. • Closely collaborating with diverse design teams, including Custom Analog, Mixed-Signal, Digital, RF and more, to understand their needs and requirements on circuit ERC and power flows. Applying advanced techniques to address these requirements across multiple products and reduce duplicate design work. • Working in tandem with other domain in CAD, Power, Technology teams to validate their ML-based applications, implement enhancements, and evaluate external vendor packages and solutions from EDA (Electronic Design Automation) providers and open-source.
Requirements
- Programming/scripting skills in Perl, Python, TCL, SKILL language, C++ or Shell.
- Minimum requirement of BS degree.
Nice To Haves
- Exposure to custom Schematic/Layout tracing via SPICE/Open Access, power gating techniques, biasing, circuit topologies (power switches, level-shifter, iso), virtual/derived/multi-power domains, standard-cells would be helpful.
- Exposure to SVRF, TCL, Liberty/.lib, UPF - IEEE1801, CPF formats.
- Exposure to industry low power tools, Siemens Calibre PERC; Cadence Conformal LEC, Virtuoso Power Manager, Innovus; Synopsys Library compiler, VCLP, Low Power verification is desirable.
- Background in SPICE simulation, SOA, device operating conditions, and knowledge of Post-layout extraction is a plus.
Responsibilities
- Developing innovative solutions on Circuit ERC (Electric Rules checks) or Power Intent analysis leveraging expertise on circuits and programming.
- Actively involving yourself in supporting ERC/Power Intent on voltage domain interactions like – supply gating mechanisms, isolation controls, level shifting, switch supplies, virtual domain interactions, power integrity etc.
- Closely collaborating with diverse design teams, including Custom Analog, Mixed-Signal, Digital, RF and more, to understand their needs and requirements on circuit ERC and power flows.
- Applying advanced techniques to address these requirements across multiple products and reduce duplicate design work.
- Working in tandem with other domain in CAD, Power, Technology teams to validate their ML-based applications, implement enhancements, and evaluate external vendor packages and solutions from EDA (Electronic Design Automation) providers and open-source.
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees
