CPU Server Power Analysis Lead

Qualcomm-posted 3 months ago
$211,900 - $317,900/Yr
Full-time • Senior
San Diego, CA
5,001-10,000 employees
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Drive Power analysis and Projections on a project involved in the development of CPUSS with emphasis in power analysis. Define CPU rail planning and PMIC inductor sizing working closely with SoC and Board teams. Work with CPU, SoC, and Board teams to optimize the system PDN for CPU rails. Drive thermal analysis of CPU use-cases. Responsible of Power vector plan and definition for comprehensive coverage of the CPUSS. Drive power analysis on RTL and Netlist using tools like Joules and PTPX. Work closely with RTL design, Synthesis, and physical design teams to measure and optimize power. Evaluate and propose new power optimization techniques at RTL, Synthesis and Physical Design Stages. Tabulate metrics results for analysis comparison. Work with post-Silicon teams to correlate projections with silicon power measurements. This is CPU tech-leadership role.

  • Drive Power analysis and Projections on a project involved in the development of CPUSS with emphasis in power analysis.
  • Define CPU rail planning and PMIC inductor sizing working closely with SoC and Board teams.
  • Work with CPU, SoC, and Board teams to optimize the system PDN for CPU rails.
  • Drive thermal analysis of CPU use-cases.
  • Responsible of Power vector plan and definition for comprehensive coverage of the CPUSS.
  • Drive power analysis on RTL and Netlist using tools like Joules and PTPX.
  • Work closely with RTL design, Synthesis, and physical design teams to measure and optimize power.
  • Evaluate and propose new power optimization techniques at RTL, Synthesis and Physical Design Stages.
  • Tabulate metrics results for analysis comparison.
  • Work with post-Silicon teams to correlate projections with silicon power measurements.
  • Extensive experience in Power analysis and optimization required.
  • 15+ years of ASIC design, or related work experience.
  • Experience with low power implementation techniques in RTL, Synthesis or Physical design stages.
  • Proficiency in scripting language, such as: Tcl, Python.
  • Strong analytical and problem-solving skills.
  • Outstanding written and verbal communication skills.
  • Low power intent concepts and languages (UPF or CPF).
  • Good understanding of Verilog/System Verilog.
  • Experience with CPU micro-architecture and their power challenges.
  • Experience in Thermal analysis.
  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants.
  • Highly competitive benefits package designed to support success at work, at home, and at play.
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