CPU Micro Architect / Logic Designer

Veltana Micro Systems - Austin, TX

- Senior

Austin, TX

About the position

Ventana Micro Systems is at the forefront of the two hottest trends that are revolutionizing the semiconductor industry: RISC-V and Chiplet Architecture. We invite you to join the revolution and contribute to one of the hottest semiconductor startups in the industry. As a CPU Micro Architect / Logic Designer, you will develop and refine microarchitecture, write design specifications, and deliver and maintain RTL for CPU Core and/or system-level sub-units. You will work closely with physical design engineers and design verification/validation engineers to ensure the successful realization and testing of the designs.

Responsibilities

• Develop and refine microarchitecture, write design specifications, and deliver and maintain RTL for CPU Core and/or system-level sub-units
• Work with physical design engineers to physically realize Core/subsystem RTL using deep sub-micron process technologies
• Work with design verification/validation engineers to effectively test and debug Core/subsystem-level RTL in simulation, prototyping platforms, and silicon
• Help model, analyze, debug, and address performance issues and opportunities

Requirements

• 8+ years industry experience working on RTL for high performance CPU or GPU, memory subsystem, or related system-level designs
• Bachelors or Masters degree in related engineering field
• Ability to work independently and across geographies
• Strong domain knowledge of computer architecture

Nice-to-haves

• Verilog/SystemVerilog development experience
• Industry experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC-V, POWER) and/or coherent caching systems
• Experience with high frequency design considerations (timing, power, multiple clock domains, etc.)
• Experience with typical front-end tools including: Verilog simulators, waveform viewers, and linting tools, as well as logic synthesis and place and route
• Experience in compiled and/or interpreted (Python, perl) languages
• Unit or feature ownership throughout the project lifecycle
• Post-silicon validation
• Bachelors or Masters degree in computer science or related engineering fields