CPU Floorplan and Integration Engineer

Qualcomm • Austin, TX

142d • $179,000 - $268,400

About The Position

Qualcomm custom CPU team is looking for highly talented, innovative, teamwork-oriented individuals for our cutting-edge technology work in CPU_PD team! Our Mission We are dedicated to transforming the industry by reimagining silicon and developing next-generation custom cpus. By joining our team, you'll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing world-class high performance CPU solutions that are highly optimized for the needs of the server/compute/mobile platforms. As a CPU PD Engineer, you will work with microarchitecture, RTL design and physical design teams to design, floorplan and integrate the CPU designs meeting aggressive power, area and performance goals using industry standard tools/flows.

Requirements

• Proficiency in synthesis, place and route, and signoff timing/power analysis.
• Expertise in block-level implementation as well as full chip floorplanning and power grid planning.
• Skilled in physical design, integration, and verification of large processor and system-on-chip (SoC) designs.
• Extensive knowledge of low power and high-performance design methodologies.
• Strong understanding of circuit and layout design principles.
• Proven ability to work effectively within a team environment.
• In-depth understanding of Physical Verification methodologies.
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of relevant work experience, OR Master's degree and 5+ years, OR PhD and 4+ years.

Nice To Haves

• MS degree in Electrical Engineering.
• 10+ years of practical experience.
• Experience in deep submicron process technology nodes.
• Experience as a key technical lead driving development and delivery of physical design databases.
• Solid understanding of industry standard tools for synthesis, place & route and tape out flows.

Responsibilities

• Perform CPU physical design tasks, including floorplanning, Bump/RDL planning, IP integration, power/ground generation, and pin assignment.
• Oversee full chip floorplan, area optimizations, block partitioning, and pin assignments.
• Manage chip-level place and route, and finalize the CPU database for construction and verification.
• Coordinate custom layout integration.
• Collaborate with external teams to fulfill IP technical and delivery requirements.
• Develop workflows for chip integration and analysis.
• Ensure the designs are validated for functional and electrical robustness.

Benefits

• $179,000.00 - $268,400.00 salary range.
• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants.
• Highly competitive benefits package designed to support success at work, at home, and at play.

What This Job Offers

• Industry: Computer and Electronic Product Manufacturing