Tenstorrent-posted 3 months ago
$100,000 - $500,000/Yr
Full-time • Senior
501-1,000 employees

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. In this leadership position as a CPU Design Verification Lead, you will be responsible for validating high-performance out-of-order RISC-V CPU designs. This includes leading a team of verification engineers and working closely with architects and micro-architects to ensure the integrity of these complex CPU designs. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

  • Lead a team of verification engineers to validate high-performance out-of-order RISC-V CPU designs.
  • Collaborate with architects and micro-architects to ensure the integrity of CPU designs.
  • Create and execute test plans from initial feature bring-up to closure.
  • Build robust verification environments and methodologies, including test benches, checkers, and coverage models.
  • Apply artificial intelligence techniques to boost verification productivity and improve overall quality.
  • Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
  • 7+ years of experience in microprocessor or GPU verification, with expertise in coherency, memory consistency, or pipeline.
  • Strong understanding of computer architecture and out-of-order CPU micro-architecture.
  • Proficiency in creating and executing test plans, and hands-on experience with portable test-benches, pseudo-random test generators, and emulation.
  • Strong programming skills in C++, Python, and System Verilog.
  • Highly competitive compensation package including base and variable compensation targets.
  • Equal opportunity employer.
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