CPU Design Timing Engineer

Apple Inc. • Santa Clara, CA

56d

About The Position

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure.As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project.

Requirements

• Prior experience performing timing analysis in high speed digital designs such as CPUs or other similar designs
• Understanding of physical design tools and methodology including logic synthesis, PnR, parasitic extraction, logic equivalence
• Understanding of deep sub-micron technologies and scaling trends
• Working knowledge of CPU microarchitecture including common fundamental timing paths
• Working knowledge of clock-domain crossing and reset-domain crossing
• Possess data parsing, analysis and representation/plotting skills

Nice To Haves

• Experience with RTL modeling and assertion based verification is a plus

Responsibilities

• Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency.
• Work extensively with CPU micro-architects and Implementation engineers to drive timing closure for the CPU.
• Prior experience performing timing analysis in high speed digital designs such as CPUs or other similar designs
• Understanding of physical design tools and methodology including logic synthesis, PnR, parasitic extraction, logic equivalence
• Understanding of deep sub-micron technologies and scaling trends
• Working knowledge of CPU microarchitecture including common fundamental timing paths
• Working knowledge of clock-domain crossing and reset-domain crossing
• Experience with RTL modeling and assertion based verification is a plus
• Possess data parsing, analysis and representation/plotting skills

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Industry: Computer and Electronic Product Manufacturing
• Education Level: No Education Listed
• Number of Employees: 5,001-10,000 employees